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| 3.3V CMOS OCTAL TRANSPARENT LATCHES Integrated Device Technology, Inc. IDT54/74FCT3573/A ADVANCE INFORMATION FEATURES: * 0.5 MICRON CMOS Technology * ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) * 25 mil Center SSOP Packages * Extended commercial range of -40C to +85C * VCC = 3.3V 0.3V, Normal Range or VCC = 2.7V to 3.6V, Extended Range * CMOS power levels (0.4W typ. static) * Rail-to-Rail output swing for increased noise margin * Military product compliant to MIL-STD-883, Class B DESCRIPTION: The FCT3573/A are octal transparent latches built using an advanced dual metal CMOS technology. These octal latches have 3-state outputs and are intended for bus oriented applications. The flip-flops appear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the set-up time is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH, the bus output is in the high-impedance state. FUNCTIONAL BLOCK DIAGRAM D0 D O G G D1 D O G D2 D O G D3 D O G D4 D O G D5 D O G D6 D O G D7 D O LE OE O0 O1 O2 O3 O4 O5 O6 O7 3093 drw 01 PIN CONFIGURATION OE D0 D1 D2 D3 D4 D5 D6 D7 GND 1 2 3 4 5 6 7 8 9 10 20 19 P20-1 D20-1 17 SO20-2 16 & 15 SO20-7 14 13 12 11 18 VCC O0 O1 O2 O3 O4 O5 O6 O7 LE 3093 drw 02 FUNCTION TABLE (1) DN H L X Inputs LE H H X OE L L H Outputs ON H L Z 3093 tbl 02 NOTE: 1. H = HIGH Voltage Level X = Don't Care L = LOW Voltage Level Z = High Impedance DEFINITION OF FUNCTIONAL TERMS Pin Names DN LE Description Data Inputs Latch Enable Input (Active HIGH) Output Enable Input (Active LOW) 3-State Outputs Complementary 3-State Outputs 3093 tbl 03 DIP/SOIC/SSOP TOP VIEW OE ON ON The IDT logo is a registered trademark of Integrated Device Technology, Inc. MILITARY AND COMMERCIAL TEMPERATURE RANGES (c)1995 Integrated Device Technology, Inc. AUGUST 1995 DSC-4648/- 8.13 1 IDT54/74FCT3573/3573A 3.3V CMOS OCTAL TRANSPARENT LATCHES MILITARY AND COMMERCIAL TEMPERATURE RANGES ABSOLUTE MAXIMUM RATINGS(1) Symbol Rating Commercial Military VTERM(2) Terminal Voltage -0.5 to +4.6 -0.5 to +4.6 with Respect to GND VTERM(3) Terminal Voltage -0.5 to +7.0 -0.5 to +7.0 with Respect to GND -0.5 to VTERM(4) Terminal Voltage -0.5 to with Respect to VCC + 0.5 VCC + 0.5 GND TA Operating -40 to +85 -55 to +125 Temperature TBIAS Temperature -55 to +125 -65 to +135 Under Bias TSTG Storage -55 to +125 -65 to +150 Temperature PT Power Dissipation 1.0 1.0 IOUT DC Output Current -60 to +60 -60 to +60 Unit V CAPACITANCE (TA = +25C, f = 1.0MHz) Symbol Parameter(1) CIN Input Capacitance COUT Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 3.5 4.0 Max. Unit 6.0 pF 8.0 pF V NOTE: 1. This parameter is measured at characterization but not tested. 3093 lnk 04 V C C C W mA 3093 lnk 03 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. Vcc terminals. 3. Input terminals. 4. Output and I/O terminals. 8.13 2 IDT54/74FCT3573/3573A 3.3V CMOS OCTAL TRANSPARENT LATCHES MILITARY AND COMMERCIAL TEMPERATURE RANGES DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Commercial: TA = -40C to +85C, VCC = 2.7V to 3.6V; Military: TA = -55C to +125C, VCC = 2.7V to 3.6V Symbol VIH VIL II H II L IOZH IOZL VIK IODH IODL VOH Parameter Input HIGH Level (Input pins) Input HIGH Level (I/O pins) Input LOW Level (Input and I/O pins) Input HIGH Current (Input pins)(6) Input HIGH Current (I/O pins)(6) Input LOW Current (Input pins)(6) VCC = Max. Input LOW Current (I/O pins)(6) High Impedance Output Current (3-State Output pins) (6) Clamp Diode Voltage Output HIGH Current Output LOW Current Output HIGH Voltage VCC = Max. VI = 5.5V VI = VCC VI = GND VI = GND VO = VCC VO = GND VCC = Min., IIN = -18mA VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V(3) VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V(3) VCC = Min. VIN = VIH or VIL VCC = 3.0V VIN = VIH or VIL VCC = Min. VIN = VIH or VIL IOH = -0.1mA IOH = -3mA IOH = -6mA MIL. IOH = -8mA COM'L. IOL = 0.1mA IOL = 16mA IOL = 24mA VCC = 3.0V IOL = 24mA VIN = VIH or VIL VCC = Max., VO = GND(3) -- Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level Min. 2.0 2.0 -0.5 -- -- -- -- -- -- -- -36 50 VCC-0.2 2.4 2.4 (5) -- -- -- -- -60 -- -- -- Typ.(2) -- -- -- Max. 5.5 VCC+0.5 0.8 1 1 1 1 1 1 -1.2 Unit V V A -- -- -- -- -- -- -0.7 A V mA mA V -60 90 -- 3.0 3.0 -- 0.2 0.3 0.3 -135 -110 200 -- -- -- 0.2 0.4 0.55 0.50 -240 -- VOL Output LOW Voltage V IOS VH ICCL ICCH ICCZ Short Circuit Current(4) Input Hysteresis Quiescent Power Supply Current mA mV A 150 0.1 0.1 VCC = Max., VIN = GND or VCC COM'L. MIL. 10 100 NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 3.3V, +25C ambient. 3. Not more than one output should be tested at one time. Duration of the test should not exceed one second. 4. This parameter is guaranteed but not tested. 5. VOH = VCC -0.6V at rated current. 6. The test limits for this parameter is 5A at TA = -55C. 3093 lnk 05 8.13 3 IDT54/74FCT3573/3573A 3.3V CMOS OCTAL TRANSPARENT LATCHES MILITARY AND COMMERCIAL TEMPERATURE RANGES POWER SUPPLY CHARACTERISTICS Symbol ICC ICCD Parameter Quiescent Power Supply Current Dynamic Power Supply Current(4) VCC = Max. VCC = Max. Outputs Open OE = GND One Input Toggling 50% Duty Cycle VCC = Max. Outputs Open fi =10MHz 50% Duty Cycle VIN = VCC -0.6V VIN = GND Test Conditions(1) VIN = VCC - VIN = VCC VIN = GND 0.6V(3) Min. Typ.(2) Max. Unit A A/ MHz IC Total Power Supply Current (6) VIN = VCC VIN = GND mA OE = GND LE = VCC One Bit Toggling VCC = Max. Outputs Open fi = 2.5MHz 50% Duty Cycle OE = GND LE = VCC Eight Bits Toggling VIN = VCC VIN = GND VIN = VCC -0.6V VIN = GND NOTES: 1. For conditions shown as max. or min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 3.3V, +25C ambient. 3. Per TTL driven input; all other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCPNCP/2 + fiNi) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ICC = Power Supply Current for a TTL High Input DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) NCP = Number of Clock Inputs at fCP fi = Input Frequency Ni = Number of Inputs at fi 3093 tbl 06 8.13 4 IDT54/74FCT3573/3573A 3.3V CMOS OCTAL TRANSPARENT LATCHES MILITARY AND COMMERCIAL TEMPERATURE RANGES SWITCHING CHARACTERISTICS OVER OPERATING RANGE(3) FCT3573 Com'l. Symbol Parameter Conditions(1) Min.(2) Max. FCT3573A Mil. Com'l. Max. Min.(2) Max. Mil. Min.(2) Max. Min.(2) Unit tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tSU tH tW Propagation Delay DN to ON Propagation Delay LE to ON Output Enable Time Output Disable Time Set-up Time HIGH or LOW, DN to LE Hold Time HIGH or LOW, DN to LE LE Pulse Width HIGH CL = 50pF RL = 500 1.5 2.0 1.5 1.5 2.0 1.5 6.0 8.0 13.0 12.0 7.5 -- -- -- 1.5 2.0 1.5 1.5 2.0 1.5 6.0 8.5 15.0 13.5 10.0 -- -- -- 1.5 2.0 1.5 1.5 2.0 1.5 5.0 5.2 8.5 6.5 5.5 -- -- -- 1.5 2.0 1.5 1.5 2.0 1.5 6.0 5.6 9.8 7.5 6.5 -- -- -- ns ns ns ns ns ns ns 3093 tbl 07 NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. Propagation Delays and Enable/Disable times are with VCC = 3.3V 0.3V, Normal Range. For VCC = 2.7V to 3.6V, Extended Range, all Propagation Delays and Enable/Disable times should be degraded by 20%. 8.13 5 IDT54/74FCT3573/3573A 3.3V CMOS OCTAL TRANSPARENT LATCHES MILITARY AND COMMERCIAL TEMPERATURE RANGES TEST CIRCUITS AND WAVEFORMS TEST CIRCUITS FOR ALL OUTPUTS 6V V CC SWITCH POSITION Open GND 500 V Pulse Generator R T IN V D.U.T. OUT Test Open Drain Disable Low Enable Low Disable High Enable High All Other tests Switch 6V 50pF C L 500 SET-UP, HOLD AND RELEASE TIMES DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. tSU tH tREM tSU tH PROPAGATION DELAY SAME PHASE INPUT TRANSITION tPLH OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL tPHL 3V 1.5V 0V VOH 1.5V VOL 3V 1.5V 0V 3093 drw 06 GND Open 3093 lnk 08 DEFINITIONS: CL= Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. 3093 drw 03 PULSE WIDTH 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V 3093 drw 04 LOW-HIGH-LOW PULSE tW HIGH-LOW-HIGH PULSE 1.5V 1.5V 3093 drw 05 ENABLE AND DISABLE TIMES ENABLE CONTROL INPUT tPZL OUTPUT NORMALLY LOW OUTPUT NORMALLY HIGH SWITCH 6V tPZH SWITCH GND 1.5V 0V 3V 1.5V tPHZ 0.3V VOH 0V 3093 drw 07 DISABLE 3V 1.5V tPLZ 0V 3V 0.3V VOL NOTES: 1. Diagram shown for input Control Enable-LOW and input Control DisableHIGH. 2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns. 3. If VCC is below 3V, input voltage swings should be adjusted not to exceed VCC. 8.13 6 IDT54/74FCT3573/3573A 3.3V CMOS OCTAL TRANSPARENT LATCHES MILITARY AND COMMERCIAL TEMPERATURE RANGES ORDERING INFORMATION IDT XX Temp. Range FCT X Family XX Device Type X Package X Process Blank B P D SO PY 573 573A 3 54 74 Commercial MIL-STD-883, Class B Plastic DIP (P20-1) CERDIP (D20-1) Small Outline IC (SO20-2) Shrink Small Outline Package (SO20-7) Non-Inverting Octal Transparent Latch 3.3 Volt -55C to +125C -40C to +85C 3093 drw 08 8.13 7 |
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